Exemplary embodiments of this invention relate to a semiconductor integrated circuit including a circuit element formed over the surface of a semiconductor substrate, and a semiconductor integrated circuit having a reduced parasitic capacitance between the element and the substrate and a short start-up time.
There are types of semiconductor integrated circuit that includes, in addition to active elements such as transistors formed on the surface of a semiconductor substrate, passive circuit elements such as capacitor elements, inductor elements and resistor elements formed on the same substrate.
FIG. 3 is a schematic that shows an example of a semiconductor integrated circuit which includes such passive elements. FIG. 3 shows a circuit layout of a voltage-controlled oscillation circuit 100. The oscillation circuit in FIG. 3 includes an inverter 114, quartz oscillator 116, feedback resistor Rf, fixed capacitors C1 and C2, variable capacitors CV1 and CV2, and resistors Rc1 and Rc2. The feedback resistor Rf and the quartz oscillator 116, which are mutually connected in parallel, are connected between the input terminal and the output terminal of the inverter 114. The fixed capacitor C1 and the variable capacitor CV1 are connected in series, in this order, between the input terminal of the inverter 114 and the ground (GND). The fixed capacitor C2 and the variable capacitor CV2 are connected serially, in this order, between the output terminal of the inverter 114 and the GND.
By applying the control voltage Vc to the variable capacitors CV1 and CV2 through the resistors Rc1 and Rc2, respectively, the capacitances of the variable capacitors are controlled. As a result, the oscillation frequency of the oscillation circuit 100 changes. Therefore, in order to achieve a wide frequency range, variable capacitors of CV1 and CV2 with large widths of capacitance change controlled by the voltage Vc are necessary.
However, parasitic capacitors actually exist between each of the elements and the substrate because all the elements shown in the circuit layout of FIG. 3, except for the quartz oscillator 116, are formed on the same semiconductor substrate. Specifically, large parasitic capacitors exist between the substrate and the fixed capacitors of C1 and C2 that need big areas.
The parasitic capacitors Cp1 and Cp2, between the substrate and the fixed capacitors C1 and C2, are connected in parallel with the variable capacitors CV1 and CV2, respectively, as shown with broken lines in FIG. 3. The parasitic capacitances Cp1 and Cp2 narrow the effective widths of the capacitance change of the variable capacitors CV1 and CV2. As a result, the range of the frequency change of the oscillation circuit 100 narrows. Therefore, it is necessary to reduce the parasitic capacitances Cp1 and Cp2 in order to widen the range of the frequency change of the oscillation circuit 100.
For example, reference 1 (JP 57-194562) discloses a capacitor element that is formed on a thick oxide film, which is formed on a P well layer in a surface of an N type semiconductor substrate. Forming the P well layer reduces the influence of the parasitic capacitance. However, reference 1 does not disclose the control of the electric potential of the P well layer.
Reference 2 (JP 61-84048) discloses disposing an area where the electric potential is not applied between the capacitor element and the substrate. Specifically, for example, reference 2 discloses forming an N type area to which no electric potential is applied in a surface of a P type semiconductor substrate. As a result, reference 2 discloses that a capacitor element with a small parasitic capacitance.
FIG. 4 is a partial cross sectional view of an example of a semiconductor integrated circuit 120, that shows the application of the technologies disclosed in references 1 or 2. As shown in FIG. 4, the semiconductor integrated circuit 120 has a capacitor element 130 formed on a P-type semiconductor substrate 122 that is insulated by a field isolation film 126. The capacitor element 130 has a lower electrode 132, an upper electrode 136 and a capacitance insulation film 134 stacked, the capacitance insulation film 134 being in between the lower electrode 132 and the upper electrode 136. In the surface of the semiconductor substrate 122 under the capacitor element 130, an N well 124, which corresponds to the P well layer disclosed in reference 1 or the N type area disclosed in reference 2, is formed.
When the well 124 is not formed, the capacitor Cf of the field isolation film is connected directly between the capacitor element 130 and the substrate 122. That is, the parasitic capacitance Cp1 or Cp2, shown in FIG. 3, is equal to Cf. On the other hand, if the well 124 is formed under the capacitor element 130, a junction capacitance Cw is connected in series between the well 124 and the substrate. That is, the parasitic capacitance Cp1 or Cp2 is equal to the series capacitance of Cf and Cw. As a result, the parasitic capacitance between the capacitor element 130 and the substrate 122 may be reduced.
However, a long time is required to start up the oscillation circuit 100 when an electric potential is not applied to the well 124, as shown in reference 2. That is, a long time is required to stabilize the oscillation frequency.
After the oscillation starts, an electronic signal of the oscillation frequency is applied to the electrode of the capacitor element 130. The electric potential of the well 124 is influenced by the signal and is also changed. However, a long time is required until it arrives at a static state because only a small leakage current is supplied to the well 124 through the junction between the well 124 and the substrate 122. The difference of the electric potentials between the well 124 and the substrate 122 continues to change during the period that the potential of the well changes.
The capacitance Cw between the well 124 and the substrate 122 also changes during this period because the extension of the depletion layer changes according to the change of the difference of electric potentials between the well and the substrate. As a result, the parasitic capacitance Cp (Cp1 and Cp2 of FIG. 3) also changes. Therefore, in an oscillation circuit using the capacitor element 130 shown in FIG. 4, after the oscillation starts, the change of the oscillation frequency continues for a long time.
The change of the parasitic capacitance can be prevented by applying a constant voltage, for instance, a power-supply voltage Vdd to the well 124, and fixing the potential of the well 124. However, at the frequency of oscillation, the power-supply has low impedance. Accordingly, when the well 124 is directly connected to Vdd, the well 124 is connected to the GND through the low impedance of the power supply. In other words, the capacitance Cw between the well 124 and the substrate 122 is short-circuited at the frequency of oscillation. Therefore, the effect of reducing the parasitic capacitance by forming the well 124 is lost.